Samsung S3C2410 is a 16/32-bit RISC microprocessor, designed to provide low cost, low-power and small size bust still give a high-performance solution for hand held devices and also other general mobile applications.

The S3C2410 provides separate 16KB Instruction and 16KB Data Cache, NAND Flash, virtual memory management handling (MMU), LCD controller, System Manager (chip select logic, SDRAM controller), Boot loader, 3-ch UART, 4-ch DMA, 4-ch Timers with PWM, I/O Ports, RTC, 8 channels 10-bit ADC and touch screen interface, IIC-BUS interface, IIS-BUS interface, USB Host, USB Device, SD Card & MMC Interface, 8 channels SPI and PLL for clock generation.

The S3C2410 is based on ARM920T core, and also adopts a new bus architecture, AMBA (Advanced Microcontroller Bus Architecture).

Picture: Samsung S3C2410 Block Diagram

Samsung S3C2410 Specification and Key Features:

* ARM926EJ-S CPU Core
o 64-way set-associative cache with I-Cache(16KB) and D-Cache(16KB)
o Write-through and Write-back cache operation
o MMU supports MS WinCE, LINUX, Palm OS and Symbian.
o Internal AMBA bus architecture
* System Manager
o Little/Big-Endian support
o Address space : Total 1GB
o NOR/Strata Flash, ROM, SRAM, and SDRAM
o NAND Flash Bootloader
* Operating Conditions
o Internal: 1.8V/2.0V
o External I/O : 3.3V
o Speed : 203MHz@1.8V (3.0/3.3V memory interface)
o 266MHz@2.0V (3.3V memory interface)
o Memory Interface : 3.0V/3.3V
* Package
o 272 FPBGA 14 x 14